It seems that I need more words to explain my CPU model. I'll show why
it is *impossible* to impletement *register assignment* by "=".
A HW register updates its output to its input value only when an event
occurs (typically a clock rising/falling edge). My CPU can process
serveral instrucions at the same time. For example, "R0=R0&R1; R2=R0"
means that, at next clock period, R0 will get the AND result and R2 the
current R0 value (not same as AND result). To support this feature,
registers must simulate the true HW properties like this:
class Reg
attr_accessor :value, :new_value, :data_enb
def initialize()
@value=@new_value=0
@data_enb=false
end
def assign(data)
@new_value = data
@data_enb=true
end
def update
@value, @data_enb=@new_value, false if @data_enb
end
end
"R0=R0&R1; R2=R0" will actually does "R0.assign(R0&R1);
R2.assign(R0.value)" (suppose Reg.& defined), and at later time all the
regs' update() will be called to simulate the clock event.
In short, Rx does not just represent a value, but a real register
*object*, so the variable Rx should always reference to the same
object. That's why "=" cannot be used despite of any forms.
What I want is an *object modification operator* ":=" provided by
syntax to save the translation effort, which is not so easy to do in
complex cases. What a nice thing if my CPU program "R0:=R0&R1; R2:=R0"
is just ruby program!