Any Hardware/EDA engineers out there?

ruby-talk
1

Just curious: are there any other hardware engineers or EDA software
engineers out there in RubyLand?

I’ve been thinking about starting some sort of RubyEDA site where we could
post Ruby packages/applications which are related to EDA - like RHDL.

This would be a way of promoting the use of Ruby in the EDA/hardware
design community.

Anybody else got packages that would be appropriate to put on a RubyEDA
site?

Phil

2

For the part of Maxim Integrated Products that I work for:

We use SWIG with Ruby to allow us to write ruby scripts that manipulate
Cadence design databases. We tied Cadences itkDB library (their
database access C library) to ruby.

We use Ruby for general purpose scripting (in preference to Perl and
Python).

We do not have anything we can share at this time.

Jeff.

···

On Wednesday, April 2, 2003, at 05:33 PM, Phil Tomson wrote:

Just curious: are there any other hardware engineers or EDA software
engineers out there in RubyLand?

I’ve been thinking about starting some sort of RubyEDA site where we
could
post Ruby packages/applications which are related to EDA - like RHDL.

This would be a way of promoting the use of Ruby in the EDA/hardware
design community.

Anybody else got packages that would be appropriate to put on a RubyEDA
site?

Phil

3

Here we have some C++ libs wrapped into Ruby for manipulating
verilog, LEF, DEF, and some other in house EDA formats. It’s also used in
several other Ruby-only tools for ASIC design.

Ruby is quickly eating ‘market share’ of general scripting usage, as well.
Most of the more software savvy engineers here have switched to Ruby from Perl.

We also have a project that uses Ruby + shell code to strictly maintain
reentrant UNIX environments for various projects, with a focus on software
development help.

At this time, though, I don’t think I’m at liberty to share any of it. Hmmm…
we do have some simple utilities to parse and communicate with Tcl (so many CAD
tools use Tcl). I think that could be shared, and we’ve found it quite useful
despite its simplicity.

···

On Apr 3, Phil Tomson wrote:

Just curious: are there any other hardware engineers or EDA software
engineers out there in RubyLand?

I’ve been thinking about starting some sort of RubyEDA site where we could
post Ruby packages/applications which are related to EDA - like RHDL.

This would be a way of promoting the use of Ruby in the EDA/hardware
design community.

Anybody else got packages that would be appropriate to put on a RubyEDA
site?

–
---------------------------------------------- | ----------------------
Brett Williams |

Agilent Technologies brett_williams@agilent.com
4

Please share

···

On Friday, 4 April 2003 at 2:03:50 +0900, Brett H. Williams wrote:

At this time, though, I don’t think I’m at liberty to share any of it. Hmmm…
we do have some simple utilities to parse and communicate with Tcl (so many CAD
tools use Tcl). I think that could be shared, and we’ve found it quite useful
despite its simplicity.

–
Jim Freeze

A lot of people I know believe in positive thinking, and so do I. I
believe everything positively stinks.
– Lew Col

5

In article 20030403170348.GB28569@vor-lord.ftc.agilent.com,

Just curious: are there any other hardware engineers or EDA software
engineers out there in RubyLand?

I’ve been thinking about starting some sort of RubyEDA site where we could
post Ruby packages/applications which are related to EDA - like RHDL.

This would be a way of promoting the use of Ruby in the EDA/hardware
design community.

Anybody else got packages that would be appropriate to put on a RubyEDA
site?

Here we have some C++ libs wrapped into Ruby for manipulating
verilog, LEF, DEF, and some other in house EDA formats. It’s also used in
several other Ruby-only tools for ASIC design.

Can you elaborate on ‘for manipulating verilog’?

Ruby is quickly eating ‘market share’ of general scripting usage, as well.
Most of the more software savvy engineers here have switched to Ruby from Perl.

We also have a project that uses Ruby + shell code to strictly maintain
reentrant UNIX environments for various projects, with a focus on software
development help.

At this time, though, I don’t think I’m at liberty to share any of it. Hmmm…
we do have some simple utilities to parse and communicate with Tcl (so many CAD
tools use Tcl). I think that could be shared, and we’ve found it quite useful
despite its simplicity.

Anything you can share would be good.

Phil

···

Brett H. Williams brett_williams@agilent.com wrote:

On Apr 3, Phil Tomson wrote:

6

Where are you located? I suspect, probably in the Bay Area, but I
ask this because there is a big Maxim plant here in Beaverton, Oregon
near where I live (probably just a fab, though).

Are your swig interface files for tying itkDB to Ruby sharable? You
wouldn’t need to provide any Cadence code.

Phil

In article 5DBF6B71-65F1-11D7-9CA0-003065F93FE6@mxim.com,

···

Jeff Putsch putsch@mxim.com wrote:

For the part of Maxim Integrated Products that I work for:

We use SWIG with Ruby to allow us to write ruby scripts that manipulate
Cadence design databases. We tied Cadences itkDB library (their
database access C library) to ruby.

We use Ruby for general purpose scripting (in preference to Perl and
Python).

We do not have anything we can share at this time.

Jeff.

On Wednesday, April 2, 2003, at 05:33 PM, Phil Tomson wrote:

Just curious: are there any other hardware engineers or EDA software
engineers out there in RubyLand?

I’ve been thinking about starting some sort of RubyEDA site where we
could
post Ruby packages/applications which are related to EDA - like RHDL.

This would be a way of promoting the use of Ruby in the EDA/hardware
design community.

Anybody else got packages that would be appropriate to put on a RubyEDA
site?

Phil

7

Why not? (attached) It just adds a few things to the Tk* modules, as it seems
some of the useful things in them are private.

This is primarily used to have tcl configuration files for our Ruby-based CAD
tools. So it is not terribly complex.

I must make an obligatory disclaimer: I didn’t write any of this, coworkers
Craig Files and John Bratt did (hence the mix of styles). Perhaps if this is
useful to others it could be extended, cleaned up, and made even more useful.

A little example of one way we’d use this, rather neutered:

def ScanPlan.readCommandsFile(filename, scanplan)

create a class object so it can be reached outside the scope of an

individual object (how it has to be done with Tcl)

@@current_scanplan = scanplan

Next, set up tcl configuration commands

tcl_code = <<-EOC
proc set_constraint {scantype param_name param_value} {
ruby “ScanPlan.sp_set_param(‘$scantype’,‘$param_name’,‘$param_value’)”
return “$scantype”
}
# put in any other tcl code you want here… if long could certainly
# be read in from a file instead
EOC
TclUtils.eval(tcl_code)
TclUtils.load_file(filename)
error = TclUtils.fetchValue(“errorInfo”)

If load_file had errors, it will print to stderr the error, but nothing

will actually stop our current process.

raise “Reading tcl file #{filename} generated errors.” unless error.empty?
@@current_scanplan = nil
end

This is the ruby method that is called by the tcl procedure set_constraint

In such methods we may need to access the class variable which gives

us some context (this tools does things recursively, including reading

multiple tcl configuration file for a given level of hierarchy)

def ScanPlan.sp_set_param(scantype, param_name, param_value)
ScanPlan.checkNewParam(scantype,param_name,param_value)
ScanPlan[scantype,param_name] = param_value
return param_value
end

Note that the same restrictions in communication to and from Tcl apply as when
using the Tk modules–make sure each tcl proc and each Ruby method that cross
the Tcl/Ruby boundary returns a string and nothing but a string.

TclUtils.rb (3.02 KB)

···

On Apr 4, Jim Freeze wrote:

On Friday, 4 April 2003 at 2:03:50 +0900, Brett H. Williams wrote:

At this time, though, I don’t think I’m at liberty to share any of it. Hmmm…
we do have some simple utilities to parse and communicate with Tcl (so many CAD
tools use Tcl). I think that could be shared, and we’ve found it quite useful
despite its simplicity.

Please share

–
---------------------------------------------- | --------------------------
Brett Williams | (970) 288-0475

Agilent Technologies brett_williams@agilent.com
8

Pretty much anything with (mostly) structural verilog netlists. Tools built on
top of this include scan chain stitching, scan chain verification, netlist
quality check, test vector generation netlist preparation, etc. Currently we
don’t do anything with RTL, for example, just post-synthesis netlists.

Lots of quick scripts are also written by individual chip designers who have a
need to automate any kind of hooking things up, disconnecting things, etc.
Especially at the beginning of a chip design cycle (where netlist quality is
poor and needs to be propped up for early builds) and at the end (where full
automation breaks down and things are tweaked to take care of small changes and
remaining errors of various kinds), it gets pretty heavy use.

It’s also used to convert between the above listed formats.

Something similar to this probably exists in all kinds of chip design shops all
over the country. It’d be nice if there was a robust, full-featured open
source version of such a thing.

···

On Apr 4, Phil Tomson wrote:

In article 20030403170348.GB28569@vor-lord.ftc.agilent.com,
Brett H. Williams brett_williams@agilent.com wrote:

On Apr 3, Phil Tomson wrote:

Just curious: are there any other hardware engineers or EDA software
engineers out there in RubyLand?

I’ve been thinking about starting some sort of RubyEDA site where we could
post Ruby packages/applications which are related to EDA - like RHDL.

This would be a way of promoting the use of Ruby in the EDA/hardware
design community.

Anybody else got packages that would be appropriate to put on a RubyEDA
site?

Here we have some C++ libs wrapped into Ruby for manipulating
verilog, LEF, DEF, and some other in house EDA formats. It’s also used in
several other Ruby-only tools for ASIC design.

Can you elaborate on ‘for manipulating verilog’?

–
---------------------------------------------- | --------------------------
Brett Williams | (970) 288-0475

Agilent Technologies brett_williams@agilent.com
9

I hate coming to the list for silly stuff such as this, but has
anyone been able to get MP3Tag.rb to work on Windows?

Reading tags works fine. I have the following code:

···

====
#!c:/ruby/bin/ruby.exe

require ‘mp3tag.rb’

print "before commit: "
tag = Mp3Tag.new(“tmp.mp3”)
puts tag.comment

tag.comment = "XXX"
print "set: "
puts tag.comment
tag.commit

print "after commit: "
tag = Mp3Tag.new(“tmp.mp3”)
puts tag.comment

When run on a file containing a tag with a comment of “Existing
comment” yields:

before commit: Existing comment
set: XXX
after commit: Existing comment

Ruby -v says:
ruby 1.7.3 (2002-11-17) [i386-mswin32]

The file is not changed (according to its timestamp), and several mp3
utilities do show that the tag isn’t changed.

Mp3Tag.rb is v 1.0. Anything I can do to check this? The f.write()
code in there IS getting executed, and the packed string it’s trying
to write looks correct to me; it has the right value. It just seems
the write isn’t … actually writing.

Thoughts?

Do you Yahoo!?
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http://tax.yahoo.com

10

In article 20030403180744.GC29313@vor-lord.ftc.agilent.com,

···

Brett H. Williams brett_williams@agilent.com wrote:

On Apr 4, Phil Tomson wrote:

In article 20030403170348.GB28569@vor-lord.ftc.agilent.com,
Brett H. Williams brett_williams@agilent.com wrote:

On Apr 3, Phil Tomson wrote:

Just curious: are there any other hardware engineers or EDA software
engineers out there in RubyLand?

I’ve been thinking about starting some sort of RubyEDA site where we could
post Ruby packages/applications which are related to EDA - like RHDL.

This would be a way of promoting the use of Ruby in the EDA/hardware
design community.

Anybody else got packages that would be appropriate to put on a RubyEDA
site?

Here we have some C++ libs wrapped into Ruby for manipulating
verilog, LEF, DEF, and some other in house EDA formats. It’s also used in
several other Ruby-only tools for ASIC design.

Can you elaborate on ‘for manipulating verilog’?

Pretty much anything with (mostly) structural verilog netlists. Tools built on
top of this include scan chain stitching, scan chain verification, netlist
quality check, test vector generation netlist preparation, etc. Currently we
don’t do anything with RTL, for example, just post-synthesis netlists.

Lots of quick scripts are also written by individual chip designers who have a
need to automate any kind of hooking things up, disconnecting things, etc.
Especially at the beginning of a chip design cycle (where netlist quality is
poor and needs to be propped up for early builds) and at the end (where full
automation breaks down and things are tweaked to take care of small changes and
remaining errors of various kinds), it gets pretty heavy use.

It’s also used to convert between the above listed formats.

Something similar to this probably exists in all kinds of chip design shops all
over the country. It’d be nice if there was a robust, full-featured open
source version of such a thing.

So you essentially have a Verilog parser written in Ruby?

Is this something that you could release?

Phil

11

No, although that would be kind of neat and useful to share. I wish that I
did.

It’s a SWIG/Ruby wrapper around a C++ project. One of the C++ project’s
abilities is to parse verilog (via a C lex/yacc parser linked in). Really it’s
a logical connectivity database, with optional extensions for VLSI artwork.
Kind of a poor man’s OpenAccess database (http://openeda.org).

Now there would be a useful addition for Ruby EDA… Ruby bindings to
OpenAccess. Not a trivial project though.

There are a few open source lex and yacc files for parsing verilog. I wonder
if anyone has used racc or some other Ruby tool to make a Ruby verilog parser?
That would be a very handy addition to a rubyEDA website.

···

On Apr 4, Phil Tomson wrote:

So you essentially have a Verilog parser written in Ruby?

Is this something that you could release?

Phil

–
---------------------------------------------- | --------------------------
Brett Williams | (970) 288-0475

Agilent Technologies brett_williams@agilent.com
12

In article 20030403231708.GA31723@vor-lord.ftc.agilent.com,

···

Brett H. Williams brett_williams@agilent.com wrote:

On Apr 4, Phil Tomson wrote:

So you essentially have a Verilog parser written in Ruby?

Is this something that you could release?

Phil

No, although that would be kind of neat and useful to share. I wish that I
did.

It’s a SWIG/Ruby wrapper around a C++ project. One of the C++ project’s
abilities is to parse verilog (via a C lex/yacc parser linked in). Really it’s
a logical connectivity database, with optional extensions for VLSI artwork.
Kind of a poor man’s OpenAccess database (http://openeda.org).

Now there would be a useful addition for Ruby EDA… Ruby bindings to
OpenAccess. Not a trivial project though.

There are a few open source lex and yacc files for parsing verilog. I wonder
if anyone has used racc or some other Ruby tool to make a Ruby verilog parser?
That would be a very handy addition to a rubyEDA website.

Or, I wonder how hard it might be to wrap the Icarus Verilog parser so
that it was accessable from Ruby. I’m not sure how seperate the Icarus
parser is from the rest of the simulation engine.

Phil